In recent years, attention has been attracted to a low-density parity-check (LDPC) code as an error correction code that provides high error correction capability with a feasible circuit scale. Because of its high error correction capability and ease of implementation, an LDPC code has been adopted in an error correction coding scheme for IEEE802.11n high-speed wireless LAN systems, digital broadcasting systems, and so forth.
An LDPC code is an error correction code defined by low-density parity check matrix H. An LDPC code is a block code having a block length equal to number of columns N of parity check matrix H. For example, Non-Patent Literature 1, Non-Patent Literature 2, Non-Patent Literature 3 and Non-Patent Literature 4 propose a random LDPC code, array LDPC code and QC-LDPC code (QC: Quasi-Cyclic).
However, a characteristic of many current communication systems is that transmission information is collectively transmitted per variable-length packet or frame, as in the case of Ethernet (registered trademark). A problem with applying an LDPC code, which is a block code, to a system of this kind is, for example, how to make a fixed-length LDPC code block correspond to a variable-length Ethernet (registered trademark) frame. With IEEE802.11n, the length of a transmission information sequence and an LDPC code block length are adjusted by executing padding processing or puncturing processing on a transmission information sequence, but it is difficult to avoid a change in the coding rate and redundant sequence transmission due to padding or puncturing.
In contrast to this kind of LDPC code of block code (hereinafter referred to as “LDPC-BC: Low-Density Parity-Check Block Code”), LDPC-CC (Low-Density Parity-Check Convolutional Code) allowing encoding and decoding of information sequences of arbitrary length have been investigated (see Non-Patent Literature 1 and Non-Patent Literature 2, for example).
An LDPC-CC is a convolutional code defined by a low-density parity-check matrix, and, as an example, parity check matrix HT[0,n] of an LDPC-CC in a coding rate of R=½ (=b/c) is shown in FIG. 1. Here, element h1(m)(t) of HT[0,n] has a value of 0 or 1. All elements other than h1(m)(t) are 0. M represents the LDPC-CC memory length, and n represents the length of an LDPC-CC codeword. As shown in FIG. 1, a characteristic of an LDPC-CC parity check matrix is that it is a parallelogram-shaped matrix in which 1 is placed only in diagonal terms of the matrix and neighboring elements, and the bottom-left and top-right elements of the matrix are zero.
An LDPC-CC encoder defined by parity check matrix HT[0,n] when h1(0)(t)=1 and h2(0)(t)=1 here is represented by FIG. 2. As shown in FIG. 2, an LDPC-CC encoder is composed of M+1 shift registers of bit-length c and a modulo 2 adder (exclusive OR calculator). Consequently, a characteristic of an LDPC-CC encoder is that it can be implemented with extremely simple circuitry in comparison with a circuit that performs generator matrix multiplication or an LDPC-BC encoder that performs computation based on backward (forward) substitution. Also, since the encoder in FIG. 2 is a convolutional code encoder, it is not necessary to divide an information sequence into fixed-length blocks when encoding, and an information sequence of any length can be encoded.